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SY88232L/AL
2.5Gbps Laser Diode Driver with Integrated Limiting Amplifier
General Description
The SY88232L is a single supply 3.3V integrated laser driver and post amplifier for telecom/datacom applications with data rates from 155Mbps up to 2.5Gbps. The driver can deliver modulation current up to 85mA, and provides a high compliance voltage that makes it suitable for highcurrent operation with the laser DC-coupled to it. The post amplifier can detect signals with amplitude as low as 5mVPP. The SY88232AL is a version of the SY88232L without 50 termination resistors at the inputs of the driver and the post amplifier. The SY88232AL is to be used specially in SFF modules mounted on mother boards which have preinstalled terminations. Removing post amplifier input terminations will allow for receiver gain control. All support documentation can be found on Micrel's web site at: www.micrel.com.
Features
2.4V minimum laser compliance voltage Operation up to 2.5Gbps Integrated APC circuit Modulation current up to 85mA Bias current up to 70mA Bias, Modulation, and power monitoring High input sensitivity post amplifier, 5mVPP Programmable LOS level (R) Available in 32-pin (5mm x 5mm) MLF package
Applications
Multi-rate burst mode applications: A-PON, B-PON, G-PON, E-PON, GE-PON
___________________________________________________________________________________________________________
Typical Application
MLF and MicroLeadFrame are registered trademarks of Amkor Technology Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
June 2009
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SY88232L/AL
Ordering Information(1)
Part Number SY88232LMG SY88232LMGTR SY88232ALMG SY88232ALMGTR
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = +25C, DC Electricals only. 2. Tape and Reel.
(2) (2)
Voltage 3.3V 3.3V 3.3V 3.3V
Temperature Range -40 to +85C -40 to +85C -40 to +85C -40 to +85C
Package Type MLF-32 MLF-32 MLF-32 MLF-32
Package Marking SY88232L with Pb-Free bar-line indicator SY88232L with Pb-Free bar-line indicator SY88232A with Pb-Free bar-line indicator SY88232A with Pb-Free bar-line indicator
Lead Finish NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free NiPdAu Pb-Free
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SY88232L/AL
Pin Configuration
32-Pin MLF (MLF-32)
(R)
Pin Description
Pin Number 1 2 3 Pin Name LOS/SD_SEL LOSLVL LOS/SD Pin Function LOS or SD selection, TTL input. Set high, connect to VCC, or leave open to select LOS. Set low or connect to GND to select SD. Loss-of-Signal Level Set. A resistor from this pin to VCC sets the threshold for the data input amplitude at which LOS will be asserted. Loss-of-Signal (LOS selected): asserts high when the data input amplitude falls below the threshold set by LOSLVL. Signal Detect (SD selected): asserts low when the data input amplitude falls below the threshold set by LOSLVL. 4 JAM Active low TTL/CMOS. Internally pulled-up with 75k. Connect to GND or apply a low level signal (<0.8 V) to enable the post amp output. Can be shorted to LOS/SD (pin 3) to create a squelch function. The polarity of this input follows the polarity of LOS/SD. SY88232L: Driver Non-inverting input data. Internally terminated with 50 to a reference voltage. SY88232AL: Driver Non-inverting input data. No internal termination. 7 DINSY88232L: Driver inverting input data. Internally terminated with 50 to a reference voltage. SY88232AL: Driver inverting input data. No internal termination. 9 /TXDIS Transmitter Complementary Fast Disable. TTL input. The transmitter is enabled when this pin is asserted High or left open and disabled when this pin is asserted Low. A 6.3k resistor must be installed between pin 10 and GND if /TXDIS is used as TTL input. Transmitter Fast Disable. TTL Input. The transmitter is enabled when this pin is asserted Low and disabled when this pin is asserted High or left open. A 6.3k resistor must be installed between pins 9 and GND if TXDIS is used as TTL input. Active low TTL/CMOS. Internally pulled-up. Pull-down with a 22k or lower resistance or apply a low level signal (<0.8V) to enable bias and modulation. Keep floating or apply a high level (>2V) to disable.
6
DIN+
10
TXDIS
11
/TXEN
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SY88232L/AL
Pin Description (continued)
Pin Number 12 13 14 Pin Name APCSET MODSET BIASMAX Pin Function Bias current setting and control. The bias current is set by installing an external resistor from this pin to ground or using a current source. Connect a 50k resistor to GND for open loop operation. Modulation current setting and control. The modulation current is set by installing an external resistor from this pin to ground or using a current source. Install a resistor between this pin and GND to set the maximum bias current for the closed loop operation. The APC loop controls the bias current up to the level of BIASMAX. When the bias current reaches the maximum value set through this pin, the driver continues to sink a current equal to this maximum. For open loop operations, this pin sets the bias current. Modulation Current Monitor. Provides a current, which represents 1/100 of the modulation current. Install a resistor between this pin and GND to convert that current to a voltage proportional to the modulation current. Inverted modulation current output. Provides modulation current when input data is negative. Non-inverted modulation current output. Provides modulation current when input data is positive. Bias current output, sources current when /TXDIS is high. Connect to the cathode of the laser through a resistor. Input from the laser monitoring photodiode. Connect to the anode of the laser photodiode for APC operation. Bias Monitor. Provides a current, which represents 1/50 of the bias current. Install a resistor between this pin and GND to convert that current to a voltage. Received Signal Strength Indicator. Install a resistor from this pin to GND to get a voltage proportional to the received signal. Indicates APC failure when High. Active High TTL/CMOS. Use a 10k Pull up. SY88232L: Post amplifier Non-inverting input data. Internally terminated with 50 to a reference voltage. SY88232AL: Post amplifier Non-inverting input data. No internal termination. 28 30 31 5, 8, 16, 24, 29 17, 20, 32 RINROUTROUT+ GND SY88232L: Driver inverting input data. Internally terminated with 50 to a reference voltage. SY88232AL: Driver inverting input data. No internal termination. Post Amplifier Complementary CML data output. Post Amplifier true CML data output. Ground. Ground and exposed pad must be connected to the plane of the most negative potential. Supply Voltage. Bypass with a 0.1F//0.01F low ESR capacitor as close to VCC pin as possible.
15
MODMON
18 19 21 22 23 24 25 27
MODMOD+ BIAS MD BIASMON RSSI APCFAULT RIN+
June 2009
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SY88232L/AL
Truth Tables
DIN+ DIN/TXEN MOD+
(2)
MOD-
Laser Output (3) Power L H L
(1, 3)
LOS/SD_SEL H H L L
Function Selected LOS LOS SD SD
JAM L H L H
Output Enabled Disabled Disabled Enabled
L H X
H L X
L L X
H L H
L H L
Table 1. Modulation Output Truth Table
Table 3. Post Amp Output Truth Table
/TXEN L L H
Notes:
BIAS ON OFF OFF
(1)
Table 2. BIAS Output Truth Table
1. Assuming /TXDIS = H and a 6.3k resistor installed between TXDIS and GND or TXDIS = L and a 6.3k resistor installed between /TXDIS and GND 2. IMOD = 0 when MOD+ = H. 3. Assuming that the cathode of the laser is connected to MOD+.
June 2009
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SY88232L/AL
Absolute Maximum Ratings(1)
Supply Voltage (VIN) ........................................-0.5V to +4.0V CML Input Voltage (VIN) ......................VCC-1.2V to VCC+0.5V TTL Control Input Voltage (VIN)................................0V to VCC Lead Temperature (soldering, 20sec.) .......................+260C Storage Temperature (Ts) ........................... -65C to +150C
Operating Ratings(2)
Supply Voltage (VCC) ...................................... +3.0V to +3.6V Ambient Temperature (TA) ............................ -40C to +85C (3) Package Thermal Resistance (R) MLF (qJA) Still-air .......................................................... 60C/W (yJB) ...................................................................... 33C/W
DC Electrical Characteristics
TA = -40C to +85C and VCC = +3.0V to +3.6V, unless otherwise noted. Typical values are VCC = +3.3V, TA = 25C, IMOD = 30mA, IBIAS = 30mA.
Symbol ICC VIL VIH Parameter Power Supply Current TXDIS, /TXDIS, /TXEN, JAM, and LOS/SD_SEL Input Low TXDIS, /TXDIS, /TXEN, JAM, and LOS/SD_SEL Input High Condition Modulation and Bias currents excluded -0.3 2 Min Typ 90 Max 150
(4)
Units mA V V
0.8 VCC + 0.3
Laser Driver
VMOD_MIN Minimum Voltage Required at the Driver Output, MOD+ and MOD-, for Proper Operation Minimum Voltage Required at the Driver Output, BIAS pin, for Proper Operation Bias-ON Current Bias-OFF Current Input Resistance at DIN+ and DINAPCFAULT Output Low APCFAULT Output Leakage Current range at MD pin Voltage at Bias pin 0.8V Current at BIAS pin when /EN is high or TXDIS is low and a 6.3k installed between /TXDIS and GND Single ended IOL = 2mA VOH = VCC 50 42.5 50 0.6 V
VBIAS_MIN
0.8
V
IBIAS IBIAS_OFF RIN
1
70 150 57.5 0.5 100 1500
mA A V A A
(SY88232L only)
VOL IOH IMD
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. qJB uses a 4-layer and qJA in still air unless otherwise stated. 4. ICC = 150mA for worst-case conditions with IMOD = 85mA, IBias = 70mA, TA = +85C, VCC = 3.6V.
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SY88232L/AL
Post Amplifier
Symbol LOSLVL VOH VOL VRSSI VOFFSET Z0 (ROUT) ZI (RIN) Parameter LOSLVL Voltage ROUT+, ROUT- HIGH Voltage ROUT+, ROUT- LOW Voltage Maximum voltage at RSSI pin Differential Output Offset Single-Ended Output Impedance Single-Ended Input Impedance LOS/SD Output Low LOS/SD Output Leakage IOL = 2mA VOH = VCC 42.5 42.5 50 50 Condition Min VCC -1.3 VCC-0.020 VCC-0.475 VCC-0.005 VCC-0.400 Typ Max VCC VCC VCC-0.350 1.2 80 57.5 57.5 0.5 100 Units V V V V mV V A
(SY88232L only)
VOL(LOS/SD) IOH(LOS/SD)
June 2009
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SY88232L/AL
AC Electrical Characteristics
TA = -40C to +85C and VCC = +3.0V to +3.6V, unless otherwise noted. Typical values are VCC = +3.3V, TA = 25C, IMOD = 30mA, IBIAS = 30mA.
Symbol Parameter Condition Min Typ Max Units
Laser Driver
Data Rate VDIFF-IN (DIN) IMOD Differential Input Voltage Swing Modulation Current
(5)
NRZ
0.155 100
2.5 2400 85 70
(6)
Gbps mVPP mA mA A
AC-coupled DC-coupled, Voltage at MOD pin 0.6V Current at MOD+ when /TXEN is high or TXDIS is low and a 6.3k installed between /TXDIS and GND Current at MOD- when /TXEN is high or TXDIS is low and a 6.3k installed between /TXDIS and GND 20% to 80%, IMOD = 60mA 20% to 80%, IMOD = 60mA 155Mbps data rate 622Mbps data rate 1.25Gbps data rate 2.5Gbps data rate Power up with /TXEN low, TXDIS high, and a 6.3k installed between /TXDIS and GND /TXEN changes from high to low with power ON, TXDIS high, and a 6.3k installed between /TXDIS and GND
10 10
150
IMOD_OFF
Modulation OFF Current
150 60 60 85 85 30 30 30 30 12 10
A ps ps psPP psPP psPP psPP s s
tr tf
Output Current Rise Time Output Current Fall Time
Jitter
Total Jitter
(7)
tINIT
APC Loop Initialization Time
TXDIS changes from low to high with power ON, /TXEN low, and a 6.3k installed between /TXDIS and GND 622Mbps 1.25Gbps 2.5Gbps 720 576 576
2.5
ns ns ns ns
Notes: 5. 6. 7. Load = 15. Assuming VCC = 3.0V, Laser bandgap voltage = 1V, laser package inductance = 1nH, laser equivalent series resistor = 5, and damping resistor = 10. Total jitter is measured using 2 - 1 PRBS pattern.
7
June 2009
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SY88232L/AL
Post Amplifier
Symbol tr, tf tJITTER VDiff_IN (RIN) VDiff_OUT (ROUT) GRSSI RSSI Linearity LOSAL LOSDL HSYL LOSAM LOSDM HSYM LOSAH LOSDH HSYH TOFF TON B-3dB AV(Diff) S21
Notes: 8. 9. Amplifier in limiting mode. Input is a 200MHz square wave. Deterministic jitter measured using 2.5Gbps K28.5 pattern, VID = 10mVPP.
Parameter Output Rise/Fall Time (20% to 80%) Deterministic Random Differential Input Voltage Swing Differential Output Voltage Swing RSSI Gain = IRSSI / VDiff_IN (RIN)
Condition Note 8 Note 9 Note 10
Min
Typ 60 15 5
Max 120
Units ps psPP psRMS
5 Note 8 5mVPP VDiff_IN (RIN) 200mVPP 5mVPP VDiff_IN (RIN) 200mVPP 700 800 5 2.5 2 1.5 4 1.5 15 1.5 8 10 2.6 12 16 2.8 25 36 3.2 2 2 2.0 38 26 32
1800 950
mVPP mVPP A/ mVPP % mVPP
Low LOS Assert Level Low LOS De-assert Level Low LOS Hysteresis Medium LOS Assert Level Medium LOS De-assert Level Medium LOS Hysteresis High LOS Assert Level High LOS De-assert Level High LOS Hysteresis LOS Release Time LOS Assert Time 3dB Bandwidth Differential Voltage Gain Single-Ended Small-Signal Gain
RLOSLVL = 15k RLOSLVL = 15k RLOSLVL = 15k, Note 11 RLOSLVL = 5k RLOSLVL = 5k RLOSLVL = 5k, Note 11 RLOSLVL = 100 RLOSLVL = 100 RLOSLVL = 100 Note 12 Note 12
20 6 30 6 50 6 10 10
mVPP dB mVPP mVPP dB mVPP mVPP dB s s GHz dB dB
10. Random jitter measured using 2.5Gbps K28.7 pattern, VID = 10mVPP. 11. This specification defines electrical hysteresis as 20log (LOS De-Assert/LOS Assert). The ratio between optical hysteresis and electrical hysteresis is found to vary between 1.5 and 2 depending upon the level of received optical power and ROSA characteristics. Based on that ratio, the optical hysteresis corresponding to the electrical hysteresis range 1dB-4.5 dB, shown in the AC characteristics table, will be 0.5dB-3dB Optical Hysteresis. 12. In real world applications, the LOS Release/Assert time can be strongly influenced by the RC time constant of the AC-coupling cap and the 50 input termination. To keep this time low, use a decoupling cap with the lowest value that is allowed by the data rate and the number of consecutive identical bits in the application (typical values are in the range of 0.001F to 1.0F).
June 2009
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SY88232L/AL
Typical Characteristics Laser Driver
IBIAS vs. IBIASMAXSET
100 90
100 90 80
IBIAS vs. RBIASMAXSET
0.05
IBIASMON Gain
IBIASMON/IBIAS (mA)
0.04 0.03 0.02 0.01 0.00
IBIAS (mA)
60 50 40 30 20 10 0
0 50 100 150 200 250 300 350 400 450 500
IBIAS (mA)
80 70
70 60 50 40 30 20 10 0
IBIASMAXSET (mA)
0
10
RBIASMAXSET (kW)
20
30
40
50
0
10 20 30 40 50 60 70 80 90 100
IBIAS (mA)
Modulation Gain
100 90 80 70 60 50 40 30 20 10 0 0 50 100 150 200 250 300 350 400
IMOD vs. RMODSET
100 90 80 70 60 50 40 30 20 10 0
0 5
IMOD (mA)
IMOD (mA)
IMODSET (A)
RMODSET (kW)
10
15
20
25
30
Post Amplifier
1400 1200 1000
IRSSI vs. RIN
100
LOSA and LOSD vs. RLOSLVL
800 600 400 200 0
0 50 100 150 200
VDIFF_IN (mV)
IRSSI (A)
10
1
100 1000
VDIFF_IN (mVPP)
RLOSLVL (W)
10000
100000
June 2009
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SY88232L/AL
Functional Characteristics Laser Driver
June 2009
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SY88232L/AL
Functional Characteristics (continued)
Post Amplifier
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Functional Diagram
The SY88232L is shown. For the SY88232AL, 50 terminations should be removed from DIN and RIN.
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SY88232L/AL diode anode through a series resistor. MOD+ and MODare terminated to VCC with a resistor in series with an other resistor in parallel with an inductor. To minimize the components count, MOD+ and MOD- can simply be DC coupled to the cathode and anode of the laser respectively with a single series resistor without capacitor and without termination network.
Functional Description
Laser Driver
The laser driver is comprised from a modulator, a bias circuit, and a digital APC loop. The driver features bias and modulation current monitoring functions, which can be configured for optical power monitoring. BIAS and Modulation Setting Bias and modulation currents are set by installing resistors from APCSET to ground and from MODSET to ground respectively or by applying a negative current at those pins. IBIAS variation versus RBIASMAXSET resistor and IBIASMAXSET , and IMOD variation versus RMODSET resistor and IMODSET are shown on page 10. BIASMAX A resistor between BIASMAX pin and ground sets the maximum bias the driver can sink. At normal operation, the bias current tracks the laser optical power through the laser monitoring photodiode and the APC loop to compensate for any power deviation from the nominal value set at the start of operation using APCSET. If for any failure (laser or photodiode degradation, open feedback circuit etc...) the APC loop keeps increasing the bias current to compensate for the low power indication, the bias current will stop increasing when it reaches BIASMAX value and continues to operate at that maximum value and APCFAULT is asserted. BIASMAX also sets the bias current when the circuit is operating in the open loop mode. APC Loop Function At start up, with the driver enabled, TXDIS low and /TXEN low, the laser turns ON within a few microseconds and its back facet monitoring photodiode starts to generate a photocurrent proportional to the optical power. The photocurrent is fed back to the MD pin on the driver where it's converted to a voltage. The conversion voltage is compared to APCSET on the driver. At equilibrium, the feedback voltage equals the APCSET voltage and the laser optical power reaches its nominal value. If the laser power deviates from its nominal value, the APC loop brings it back to its nominal setting. APC Loop Failure The APCFAULT is asserted High if the bias current reaches BIASMAX or if the APC loop counter reaches its minimum or its maximum counts. Interfacing the Driver with the Laser Diode As shown on the "Typical Application" drawing, MOD+ pin is AC coupled to the laser diode cathode through a series resistor and MOD- is AC coupled to the laser June 2009 14
Post Amplifier
The post amplifier detects and amplifies signals with data rates from DC up to 3.2Gbps, and amplitude as small as 5mVPP. To reduce the noise at the output of the post amplifier when the input signal is absent or lower than the minimum detectable level set by LOSLVL, a JAM pin is provided, which can be connected to LOS/SD output to turn off the output buffer when LOSS/SD is asserted. Input Amplifier/Buffer Figure 1-d shows a simplified schematic of the input stage. The high-sensitivity of the input amplifier allows signals as small as 5mVPP to be detected and amplified. The input amplifier allows input signals as large as 1800mVPP. Small input signals below typically 12mVPP are linearly amplified with a typically 38dB differential voltage gain. For input signals larger than 12mVPP, the output signal is limited to typically 800mVPP. Output Buffer The post amplifier CML output buffer is designed to drive 50 lines and is internally terminated with 50 to VCC. Figure 1e shows a simplified schematic of the output stage. Loss-of-Signal The post amplifier generates a selectable chatter-free loss-of-signal (LOS) or signal detect (SD) open-collector TTL output as shown in Figure 2d. LOS/SD is used to determine that the input amplitude is too small to be considered as a valid input. When the LOSS function is selected (LOS/SD_SEL=1), LOS/SD asserts high if the input amplitude falls below the threshold set by LOSLVL and de-asserts low otherwise. IF SD function is selected (LOS/SD_SEL=0), LOS/SD asserts low if the input amplitude falls below the threshold set by LOSLVL and de-asserts high otherwise. LOS/SD can be fed back to the JAM input to maintain output stability under a loss of signal condition. Jam de-asserts low the true output signal without removing the input signals. Typically, 3dB LOS hysteresis is provided to prevent chattering. Loss/Signal Detect Selection A pin (LOS/SD_SEL) is provided to select between LOS (set to high) or SD (set to low) function. It also controls the internal circuitry of JAM input to follow LOS/SD selection.
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Micrel, Inc. Loss-of-Signal-Level Set A programmable LOS/SD level set pin (LOSLVL) sets the threshold of the input amplitude detection. Connecting an external resistor between VCC and LOSLVL sets the voltage at LOSLVL. This voltage ranges from VCC to VCC -1.3V. The external resistor creates a voltage divider between VCC and VCC-1.3V, as shown in Figure 2c. Hysteresis The post amplifier provides typically 3dB LOS electrical hysteresis, which is defined as 20log (VINLOS-Assert / VINLOS-De-Assert). Since the relationship between the voltage out of the ROSA to optical power at its input is linear, the optical hysteresis will be typically half of the electrical hysteresis reported in the datasheet, but in practice the ratio between electrical and optical hysteresis is found to be within the range 1.5 to 1.8. Thus, 3dB electrical hysteresis will correspond to an optical hysteresis within the range 1.6dB to 2dB.
SY88232L/AL RSSI Pin The post amplifier has an RSSI (Received Signal Strength) pin, which provides a current proportional to the amplitude of the signal at the input of the post amplifier from the ROSA. Install a resistor between this pin and GND to convert the current into a monitoring voltage proportional to the amplitude of the signal at the input of the post amplifier. The value of the resistor should be selected to keep the voltage at the RSSI pin under its limit of 1.2V to maintain RSSI linearity.
June 2009
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SY88232L/AL
Input and Output Stages (SY88232L)(1)
Figure 1a. Simplified Driver Input Stage
(1)
Figure 1b. Simplified TXDIS Input Stage
Figure 1c. Simplified Driver Output Stage
Figure 1d. Post Amplifier Input Stage
(1)
Figure 1e. Post Amplifier Output Stage
Note: 1. Applies for SY88232L only. For SY88232AL input terminations need to be removed.
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Interfacing DIN to Different Logic Drivers (SY88232L) (1)
Figure 2a. Driving DIN with PECL Outputs
(1)
Figure 2b. Driving DIN with CML Outputs
(1)
Figure 2c. LOSLVL Setting Circuit
Figure 2d. LOS Output Structure
Note: 1. Applies for SY88232L only. For SY88232AL input terminations need to be added.
June 2009
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Package Information
32-Pin (5mm x 5mm) MLF (MLF-32)
(R)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2009 Micrel, Incorporated.
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